View STEVAL-IFP007V1_4557415.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

STEVAL-IFP007V1
16-bit PLC digital input card demonstration board based on the SCLT3
Data brief
Features

8/16 input channel topology (SCLT3-8 chip/STEVAL-IFP007V1 board) Fully integrated current limiter Termination for IEC61131-2 type 1 and 3 inputs Digital filter in each input SPI communication peripheral Voltage regulator integrated on the chip Thermal alarm Wide range supply voltage operation
Description
The STEVAL-IFP07V1 demonstration board is based on the SCLT3-8 protected digital input termination with serialized state transfer, and allows the user to evaluate the behavior of the SCLT3-8 device in industrial environmental conditions. The SCLT3-8 is an eight channel termination used to interface automation digital inputs. It is designed for 24 VDC applications, and supports the type 3 input characteristic in accordance with standard IEC61131-2 (programmable controllers). The device integrates an SPI peripheral for communication with logic devices, ASICs and microcontrollers. This demonstration board is capable of transferring not only the data but also additional information such as thermal alarms, under voltage indications and parity bits. The STEVALIFP07V1 is ideal for applications with a high channel count, while the serial communication reduces the number of lines which, in most final applications, require galvanic isolation. The board accommodates two SCLT3-8 chips connected to the SPI bus in a "daisy-chain" configuration. It offers a 16-bit digital input
STEVAL-IFP007V1 interface and indicates each sensor logic state with an LED.
May 2009
Doc ID 15371 Rev 2
1/4
www.st.com 4
For further information contact your local STMicroelectronics sales office.
1
DVR DV OSC OS SPM COMp COM VC VCS VC COMp COM IN1 IN2 IN3 IN4 COMp COM IN5 IN6 IN7 IN8 COMp COM NC NC nCS_SCL nCS_SC T1 SC _SCL T1 SCK _S VDD VD SD_ SD_0 R7 L ED0 ED L ED ED1 L ED2 ED L ED ED3 L ED4 ED L ED ED5 L ED6 ED L ED ED7 Vo1 Vo C1 C2 nCS_O T nCS_OP nCS_OP nCS_O T A2
Shield Shi
C OM p
39
C OM p
39
2/4
Circuit schematic
Figure 1.
SPI_S AVE _SL AV R50 22R R5 22 VDD VD C1 33n 33nF U1 R2 51k VC_U1 VC_U VCS VC MI CRO_VCC CRO_VC nCS_uC nCS_u 15k SGND SGN VDD VD SCK _O SC _OPT A1 2 3 4 1 R48 R4 330R R59 R5 330R R49 R4 330R R60 R6 330R MI CRO_GN CR GND nCS_uC nCS_u nCS_uC nCS_u SCK _O SC _OPT 7 8 VDD VD U5 SC SCK CL K _u _uC CL K _u _uC 1 poin Test point CS 1 Test point poin MI SO 73L ACP L -K 73 MI SO_u SO_uC 1 Test point poin VDD VD MI CRO_VCC CRO_VC 6 GND_MI CR CRO MI CR GND CRO_GN 1 VDD4 VDD R51 22R R5 22 VDD VD C18 C1 33nF 33n SGND SGN U2 R19 R1 51k VC_U2 VC_U VCS VC SGND SGN nCS_SCL nCS_SC T2 15k C22 C2 100pF 100p SGND SGN SD_0f R56 R5 220R C23 C2 100pF 100p SGND SGN VDD4 VDD SGND SGN SD_0 SD_ R55 R5 220R nCS_OP nCS_O T MI SO_SCL T SO_SC R24 R2 L ED8 ED L ED ED9 L ED10 L ED11 L ED12 L ED13 L ED14 L ED15 nCS_SCL nCS_SC T2 SCK _S SC _SCL T2 SD_0f SPM C21 C2 100p 100pF DVR DV SGND SGN SCK _O SC _OPT R54 R5 220R SCK _SCL SC _S T2 R58 R5 330R 3 C
Shield Shi
L SB
SPI_MASTER to be connected _MASTER CN10 CN1
CN1 CN DVR DV SPM SGND SGN
1
2
Input nput Input nput nput Input Input nput
0 1 2 3
3
4
R1 R3 R4 R5
2k2 2k2 2k2 2k2
IN0 IN1 IN2 IN3
C40 C4 C41 C4 C42 C4 C43 C4
1nF 1n 1n 1nF 1nF 1n 1n 1nF
SGND SGN
ST70 2x2 CN2 CN C13 C1 10uF/6.3V 10u /6.3V C14 C1 10uF/6.3V 10u /6.3V
R6 C4 33nF 33n MI CR GND CRO_GN IN0 IN1 IN2 IN3
CL K _uC _u MI SO_u SO_uC
1
VCC
2
1k0
MI CRO_VC CRO_VCC
3
nput Input 4 nput Input 5 Input 6 nput nput Input 7
4
R8 R10 R1 R11 R1 R12 R1
2k2 2k2 2k2 2k2
IN4 IN5 IN6 IN7
C44 C4 C45 C4 C46 C4 C47 C4
1nF 1n 1nF 1n 1n 1nF 1nF 1n
1 3 5 7 9 11 13 15 17 19
2 4 6 8 10 12 14 16 18 20 ML W20G W20
ST70 2x2 CN3 CN IN4 IN5 IN6 IN7 R52 R5 220R SCK _SCL SC _S T1 C19 C1 100pF 100p SGND SGN nCS_SCL nCS_SC T1 GND GN C20 C2 100pF 100p SGND SGN MI SO_SCL T SO_SC R57 R5 330R U6 1A SGND SGN SGND SGN R53 R5 220R 6
SGND SGN
MI CRO_GN CR GND
1
2
Circuit schematic
Input nput nput Input nput Input Input nput SCL 8BT8 SC T3- 8BT
8 9 10 11
3
4
R13 R1 R14 R1 R15 R1 R16 R1
2k2 2k2 2k2 2k2
C48 IN8 C4 C49 IN9 C4 N10 C50 IN1 C5 N11 C51 IN1 C5
1n 1nF 1n 1nF 1nF 1n 1nF 1n
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 VDD VD NC NC CS SCK SC MOSI MOS MI SO MI SO COMs REF RE NC L D1 L D2 L D3 L D4 L D5 L D6 L D7 L D8
38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20
Schematic diagram
ST70 2x2 CN4 CN
1
2
Input nput Input nput Input nput Input nput Vo2 C2 Vo 100n 100nF 5 GND GN
12 13 14 15
3
4
R17 R1 R18 R1 R20 R2 R21 R2
2k2 2k2 2k2 2k2
IN1 C5 N12 C52 IN1 C5 N13 C53 IN1 C5 N14 C54 IN1 C5 N15 C55
1n 1nF 1n 1nF 1n 1nF 1n 1nF
ST70 2x2
GND GN
VCC
2 NC
Vo
5
MI SO_uC SO_u C25 C2 100nF 100n 4 GND GN W70L ACP L -W70 MI CRO_GN CR GND
Test point poin
Doc ID 15371 Rev 2
C6 33nF 33n IN1 N12 IN1 N13 N14 IN1 N15 IN1 IN8 IN9 IN1 N10 IN1 N11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 DVR DV OSC OS SPM COMp COM VC VCS VC COMp COM IN1 IN2 IN3 IN4 COMp COM IN5 IN6 IN7 IN8 COMp COM NC NC SC T3- 8BT SCL 8BT8 VDD VD NC NC CS SCK SC MOSI MOS MI SO MI SO COMs REF RE NC L D1 L D2 L D3 L D4 L D5 L D6 L D7 L D8 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 solation barrier Isolation barrie GND GN VDD4 VDD DVR DV JMP JM 1 SPM JMP JM 2 SGND SGN SGND SGN
CN CN9
R43 R4
VCS VC
1 2
1M5
R44 R4 120k
ST04 2pin
GND GN
SGND SGN
SGND SGN
SGND SGN
R22 R2
VCC
GND_ WR GND_P
1k0
GND GN
1
Test poin point
SGND SGN
STEVAL-IFP007V1
STEVAL-IFP007V1
Revision history
2
Revision history
Table 1.
Date 17-Feb-2009 05-May-2009
Document revision history
Revision 1 2 Initial release. Updated picture on cover page and schematic diagram (Figure 1) Changes
Doc ID 15371 Rev 2
3/4
STEVAL-IFP007V1
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
(c) 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
4/4
Doc ID 15371 Rev 2

▲Up To Search▲

Price & Availability of STEVAL-IFP007V1

	To Download STEVAL-IFP007V1 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .